INRIA

Laurent

Welcome to my home page

Laurent GEORGE, Habilitation to Direct Research, Ph'D

Laurent GEORGE @ work

Member of LIGM Lab at University of Paris-Est,
Head of Software, Networks and Real-Time research group

My home page at LIGM

Associate Researcher at INRIA Rocquencourt
AOSTE Team

INRIA Rocquencourt
BP 105, Domaine de Voluceau
78153, Le Chesnay Cedex
France

Phone: +33 1 39 63 54 55 / Fax: +33 1 39 63 53 72

Email: Laurent.George@univ-mlv.fr or Laurent.George@inria.fr


Research | Publications | Thesis advisor | Teaching activities | Program committee and reviews |

Research

I am currently Professor at ESIEE Paris, member of LIGM lab at University of Paris-Est and associate researcher at INRIA Paris-Rocquencourt in the AOSTE team. You can find the main goals of the AOSTE team here. My research activities concern real-time scheduling in embedded and in distributed system.

Keywords: multiprocessor scheduling, sensitivity analysis, real-time sensor networks


Education


Publications

Journal papers International Conferences International Workshops French conferences INRIA research reports

Thesis advisor

Here is a list of ph'D thesis I have supervised.

Teaching activities

My main teaching activities concern Networks, Real-time embedded and distributed systems, wireless networks and IoT.

Teaching experience:

Program committee and reviews

International Conferences and Workshops:
French conferences

Last modification : Monday 14 December 2009 Send your comments © INRIA Rocquencourt